h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 625

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Table 18A.7 Fast A20 Gate Output Signal
Notes: 1. Arbitrary data with bit 1 set to 1.
18A.3.4 Host Interface Pin Shutdown Function
Host interface output can be placed in the high-impedance state according to the state of the
HIFSD pin. Setting the SDE bit to 1 in the SYSCR2 register when the HI12E bit is set to 1 enables
the HIFSD pin. The HIF constantly monitors the HIFSD pin, and when this pin goes low, places
the host interface output pins (HIRQ1, HIRQ11, HIRQ12, HIRQ3, HIRQ4, and GA20) in the
high-impedance state. At the same time, the host interface input pins (CS1, CS2 or ECS2, CS3,
CS4, IOW, IOR, and HA0) are disabled (fixed at the high input state internally) regardless of the
pin states, and the signals of the multiplexed functions of these pins (input block) are similarly
fixed internally. As a result, the host interface I/O pins (HDB7 to HDB0) also go to the high-
impedance state.
HA0
1
0
1
1
0
1
1
0
1/0
1
0
1/0
1
1
1
1
1
0
1
2. Arbitrary data with bit 1 cleared to 0.
Data/Command
H'D1 command
1 data *
H'FF command
H'D1 command
0 data *
H'FF command
H'D1 command
1 data *
Command other than H'FF
and H'D1
H'D1 command
0 data *
Command other than H'FF
and H'D1
H'D1 command
Command other than H'D1
H'D1 command
H'D1 command
H'D1 command
Any data
H'D1 command
1
2
1
2
Internal CPU
Interrupt Flag
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
0
0
Section 18A Host Interface X-Bus Interface (XBS)
Rev. 3.00 Jan 18, 2006 page 597 of 1044
GA20
(P81)
Q
1
Q (1)
Q
0
Q (0)
Q
1
Q (1)
Q
0
Q (0)
Q
Q
Q
Q
Q
1/0
Q(1/0)
Remarks
Turn-on sequence
Turn-off sequence
Turn-on sequence
(abbreviated form)
Turn-off sequence
(abbreviated form)
Cancelled sequence
Retriggered sequence
Consecutively executed
sequences
REJ09B0280-0300