h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 332

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 10 14-Bit PWM Timer
10.4
A PWM waveform like the one shown in figure 10.3 is output from the PWMX pin. When OS =
0, the value in DADR corresponds to the total width (T
conversion cycle (256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 1, the output
waveform is inverted and the DADR value corresponds to the total width (T
output pulses. Figure 10.4 shows the types of waveform output available.
Table 10.4 summarizes the relationships of the CKS, CFS, and OS bit settings to the resolution,
base cycle, and conversion cycle. The PWM output remains flat unless DADR contains at least a
certain minimum value. Table 10.4 indicates the range of DADR settings that give an output
waveform like the one in figure 10.3, and lists the conversion cycle length when low-order DADR
bits are kept cleared to 0, reducing the conversion precision to 12 bits or 10 bits.
Rev. 3.00 Jan 18, 2006 page 304 of 1044
REJ09B0280-0300
Basic cycle
(T
Operation
t
L
64 or T
t
f
256)
Figure 10.3 PWM D/A Operation
(T
1 conversion cycle
2
T: Resolution
T
(When CFS = 0, m = 256; when CFS = 1, m = 64)
14
L
=
(= 16384))
n = 1
m
t
Ln
L
(when OS = 0)
) of the low (0) pulses output in one
H
) of the high (1)

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