h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 463

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

15.2.6
SCR is a register that performs enabling or disabling of SCI transfer operations, serial clock output
in asynchronous mode, and interrupt requests, and selection of the serial clock source.
SCR can be read or written to by the CPU at all times.
SCR is initialized to H'00 by a reset, and in standby mode, watch mode, subactive mode, subsleep
mode, and module stop mode.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit-data-empty interrupt
(TXI) request generation when serial transmit data is transferred from TDR to TSR and the TDRE
flag in SSR is set to 1.
Note:
Bit 6—Receive Interrupt Enable (RIE): Enables or disables receive-data-full interrupt (RXI)
request and receive-error interrupt (ERI) request generation when serial receive data is transferred
from RSR to RDR and the RDRF flag in SSR is set to 1.
Note:
Bit 7
TIE
0
1
Bit 6
RIE
0
1
Bit
Initial value
Read/Write
* TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag,
* RXI and ERI interrupt request cancellation can be performed by reading 1 from the
Serial Control Register (SCR)
then clearing it to 0, or clearing the TIE bit to 0.
RDRF, FER, PER, or ORER flag, then clearing the flag to 0, or clearing the RIE bit to 0.
Description
Transmit-data-empty interrupt (TXI) request disabled *
Transmit-data-empty interrupt (TXI) request enabled
Description
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request
disabled *
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request
enabled
R/W
TIE
7
0
R/W
RIE
6
0
R/W
TE
5
0
Section 15 Serial Communication Interface (SCI, IrDA)
R/W
RE
4
0
Rev. 3.00 Jan 18, 2006 page 435 of 1044
MPIE
R/W
3
0
TEIE
R/W
2
0
CKE1
R/W
REJ09B0280-0300
1
0
(Initial value)
(Initial value)
CKE0
R/W
0
0