h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 443

no-image

h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
TCSR0 Bit 4—Reset Select (RSTS): Reserved. This bit should not be set to 1.
TCSR1 Bit 4—Prescaler Select (PSS): Selects the input clock source for TCNT in WDT1. For
details, see the description of the CKS2 to CKS0 bits below.
Bit 3—Reset or NMI (RST/NMI
requested on TCNT overflow in watchdog timer mode.
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select an internal clock source,
obtained by dividing the system clock ( ), or subclock (
Note:
Bit 4
PSS
0
1
Bit 3
RST/NMI
0
1
Bit 2
CKS2
0
1
WDT0 input clock selection
NMI
NMI
NMI
* The overflow period is the time from when TCNT starts counting up from H'00 until
Bit 1
CKS1
0
1
0
1
overflow occurs.
Description
TCNT counts -based prescaler (PSM) divided clock pulses
TCNT counts
Description
An NMI interrupt is requested
An internal reset is requested
Bit 0
CKS0
0
1
0
1
0
1
0
1
NMI
NMI
NMI): Specifies whether an internal reset or NMI interrupt is
SUB
Clock
-based prescaler (PSS) divided clock pulses
/2 (Initial value)
/64
/128
/512
/2048
/8192
/32768
/131072
Overflow Period * (when
51.2 µs
1.6 ms
3.2 ms
13.1 ms
52.4 ms
209.7 ms
838.9 ms
3.36 s
Rev. 3.00 Jan 18, 2006 page 415 of 1044
SUB
Description
) for input to TCNT.
Section 14 Watchdog Timer (WDT)
REJ09B0280-0300
= 10 MHz)
(Initial value)
(Initial value)

Related parts for h8s-2169