h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 566

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
16.3.9
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 16.12 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
16.3.10 Sample Flowcharts
Figures 16.13 to 16.16 show sample flowcharts for using the I
Rev. 3.00 Jan 18, 2006 page 538 of 1044
REJ09B0280-0300
SCL or
SDA input
signal
Sampling
clock
Noise Canceler
2
C Bus Interface
D
Sampling clock
System clock
period
Latch
Figure 16.13 Block Diagram of Noise Canceler
C
Q
D
Latch
C
Q
2
C bus interface in each mode.
detector
Match
Internal
SCL or
SDA
signal