h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 729

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

22.5.3
Notes: 1. In normal mode, these bits cannot be modified and are always read as 0.
EBR1 and EBR2 are registers that specify the flash memory erase area block by block; bits 7 to 0
in EBR2 are readable/writable bits. EBR1 and EBR2 are each initialized to H'00 by a reset, in
hardware standby mode, software standby mode, subactive mode, subsleep mode, and watch
mode, and when the SWE bit in FLMCR1 is not set. When a bit in EBR2 is set, the corresponding
block can be erased. Other blocks are erase-protected. Set only one bit in EBR2 (more than one bit
cannot be set). When on-chip flash memory is disabled, a read will return H'00, and writes are
invalid.
The flash memory block configuration is shown in table 22.6.
Table 22.6 Flash Memory Erase Blocks
Block (Size)
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbytes)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
Bit
EBR1
Initial value
Read/Write
Bit
EBR2
Initial value
Read/Write
2. This bit must not be set to 1.
Erase Block Registers 1 and 2 (EBR1, EBR2)
R/W *
EB7
— *
—
7
0
7
0
2
1
R/W
EB6
— *
—
6
0
6
0
Address
H'(00)0000 to H'(00)03FF
H'(00)0400 to H'(00)07FF
H'(00)0800 to H'(00)0BFF
H'(00)0C00 to H'(00)0FFF
H'(00)1000 to H'(00)7FFF
H'(00)8000 to H'(00)BFFF
H'(00)C000 to H'(00)DFFF
H'00E000 to H'00FFFF
2
EB5
R/W
— *
—
5
0
5
0
2
EB4
R/W
— *
—
4
0
4
0
2
Rev. 3.00 Jan 18, 2006 page 701 of 1044
EB3
R/W
— *
—
3
0
3
0
2
EB2
R/W
— *
—
2
0
2
0
2
REJ09B0280-0300
Section 22 ROM
EB1
R/W
— *
—
1
0
1
0
2
EB0
R/W
— *
—
0
0
0
0
2