h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 699

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
20.3
ADDRA to ADDRD are 16-bit registers, but the data bus to the bus master is only 8 bits wide.
Therefore, in accesses by the bus master, the upper byte is accessed directly, but the lower byte is
accessed via a temporary register (TEMP).
A data read from ADDR is performed as follows. When the upper byte is read, the upper byte
value is transferred to the CPU and the lower byte value is transferred to TEMP. Next, when the
lower byte is read, the TEMP contents are transferred to the CPU.
When reading ADDR, always read the upper byte before the lower byte. It is possible to read only
the upper byte, but if only the lower byte is read, incorrect data may be obtained.
Figure 20.2 shows the data flow for ADDR access.
Interface to Bus Master
Bus master
(H'AA)
Bus master
(H'40)
Lower byte read
Upper byte read
Figure 20.2 ADDR Access Operation (Reading H'AA40)
Bus interface
Bus interface
ADDRnH
ADDRnH
(H'AA)
(H'AA)
Rev. 3.00 Jan 18, 2006 page 671 of 1044
ADDRnL
ADDRnL
(H'40)
(H'40)
TEMP
TEMP
(H'40)
(H'40)
Module data bus
Module data bus
Section 20 A/D Converter
(n = A to D)
(n = A to D)
REJ09B0280-0300

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