h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 534

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 16 I
Bits 2 to 0—Bit Counter (BC2 to BC0): Bits BC2 to BC0 specify the number of bits to be
transferred next. With the I
the data is transferred with one addition acknowledge bit. Bit BC2 to BC0 settings should be made
during an interval between transfer frames. If bits BC2 to BC0 are set to a value other than 000,
the setting should be made while the SCL line is low.
The bit counter is initialized to 000 by a reset and when a start condition is detected. The value
returns to 000 at the end of a data transfer, including the acknowledge bit.
Bit 2
BC2
0
1
16.2.5
ICCR is an 8-bit readable/writable register that enables or disables the I
disables interrupts, selects master or slave mode and transmission or reception, enables or disables
acknowledgement, confirms the I
performs interrupt flag confirmation.
ICCR is initialized to H'01 by a reset and in hardware standby mode.
Rev. 3.00 Jan 18, 2006 page 506 of 1044
REJ09B0280-0300
Bit
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flag.
I
Bit 1
BC1
0
1
0
1
2
C Bus Control Register (ICCR)
2
C Bus Interface
R/W
ICE
Bit 0
BC0
0
1
0
1
0
1
0
1
7
0
2
C bus format (when the FS bit in SAR or the FSX bit in SARX is 0),
IEIC
R/W
6
0
Synchronous Serial Format
8
1
2
3
4
5
6
7
2
C bus interface bus status, issues start/stop conditions, and
MST
R/W
5
0
TRS
R/W
4
0
ACKE
R/W
Bits/Frame
3
0
I
9
2
3
4
5
6
7
8
2
C Bus Format
BBSY
R/W
2
0
2
C bus interface, enables or
R/(W) *
IRIC
1
0
(Initial value)
SCP
W
0
1

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