h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 646

no-image

h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 18B Host Interface LPC Interface (LPC)
HICR2
Bit 4
ABRT
0
1
HICR2 Bit 3—IDR3 and TWR receive complete Interrupt Enable (IBFIE3)
HICR2 Bit 2—IDR2 receive complete Interrupt Enable (IBFIE2)
HICR2 Bit 1—IDR1 receive complete Interrupt Enable (IBFIE1)
HICR2 Bit 0—Error Interrupt Enable (ERRIE)
These bits enable or disable IBFI1, IBFI2, IBFI3, and ERRI interrupts to the slave processor.
HICR2
Bit 3
0
1
Rev. 3.00 Jan 18, 2006 page 618 of 1044
REJ09B0280-0300
IBFIE3
HICR2
Bit 2
IBFIE2
0
1
Description
[Clearing conditions]
[Setting condition]
HICR2
Bit 1
IBFIE1
0
1
Writing 0 after reading ABRT = 1
LPC hardware reset (LRESET pin falling edge detection)
LPC software reset (LRSTB = 1)
LPC hardware shutdown
(SDWNE = 1 and LPCPD falling edge detection)
LPC software shutdown (SDWNB = 1)
LFRAME pin falling edge detection during LPC transfer cycle
HICR2
Bit 0
ERRIE
0
1
Description
Error interrupt requests disabled
Error interrupt requests enabled
Input data register IDR1 receive completed interrupt
request disabled
Input data register IDR1 receive completed interrupt
request enabled
Input data register IDR2 receive completed interrupt
request disabled
Input data register IDR2 receive completed interrupt
request enabled
Input data register IDR3 and TWR receive completed
interrupt requests disabled
Input data register IDR3 and TWR receive completed
interrupt requests enabled
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)

Related parts for h8s-2169