h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 220

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 7 Data Transfer Controller
Table 7.9
Object of Access
Bus width
Access states
Execution
phase
The number of execution states is calculated from the formula below. Note that
of all transfers activated by one activation event (the number for which the CHNE bit is set to one,
plus 1).
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 13 states. The time from activation to the end of the data write is 10 states.
Rev. 3.00 Jan 18, 2006 page 192 of 1044
REJ09B0280-0300
Number of execution states = I · S
Vector read
Register
information
read/write
Byte data read
Word data read
Byte data write
Word data write
Internal operation S
Number of States Required for Each Execution Phase
S
S
S
S
S
S
I
J
K
K
L
L
M
On-
Chip
RAM
32
1
—
1
1
1
1
1
1
I
+
On-
Chip
ROM
16
1
1
—
1
1
1
1
1
(J · S
Internal I/O
Registers
8
2
—
—
2
4
2
4
1
J
+ K · S
16
2
—
—
2
2
2
2
1
K
+ L · S
External Devices
8
2
4
—
2
4
2
4
1
L
) + M · S
8
3
6+2m
—
3+m
6+2m
3+m
6+2m
1
M
means the sum
16
2
2
—
2
2
2
2
1
16
3
3+m
—
3+m
3+m
3+m
3+m
1