h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 18

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
10.3 Bus Master Interface ......................................................................................................... 301
10.4 Operation .......................................................................................................................... 304
Section 11 16-Bit Free-Running Timer
11.1 Overview........................................................................................................................... 309
11.2 Register Descriptions ........................................................................................................ 313
11.3 Operation .......................................................................................................................... 327
11.4 Interrupts ........................................................................................................................... 337
11.5 Sample Application........................................................................................................... 338
11.6 Usage Notes ...................................................................................................................... 339
Section 12 8-Bit Timers
12.1 Overview........................................................................................................................... 345
12.2 Register Descriptions ........................................................................................................ 350
Rev. 3.00 Jan 18, 2006 page xviii of xxviii
11.1.1 Features................................................................................................................ 309
11.1.2 Block Diagram ..................................................................................................... 310
11.1.3 Input and Output Pins .......................................................................................... 311
11.1.4 Register Configuration......................................................................................... 312
11.2.1 Free-Running Counter (FRC) .............................................................................. 313
11.2.2 Output Compare Registers A and B (OCRA, OCRB) ......................................... 313
11.2.3 Input Capture Registers A to D (ICRA to ICRD) ................................................ 314
11.2.4 Output Compare Registers AR and AF (OCRAR, OCRAF) ............................... 315
11.2.5 Output Compare Register DM (OCRDM) ........................................................... 316
11.2.6 Timer Interrupt Enable Register (TIER) .............................................................. 316
11.2.7 Timer Control/Status Register (TCSR) ................................................................ 318
11.2.8 Timer Control Register (TCR) ............................................................................. 321
11.2.9 Timer Output Compare Control Register (TOCR) .............................................. 323
11.2.10 Module Stop Control Register (MSTPCR) .......................................................... 326
11.3.1 FRC Increment Timing ........................................................................................ 327
11.3.2 Output Compare Output Timing .......................................................................... 329
11.3.3 FRC Clear Timing................................................................................................ 330
11.3.4 Input Capture Input Timing ................................................................................. 330
11.3.5 Timing of Input Capture Flag (ICFA to ICFD) Setting ....................................... 333
11.3.6 Setting of Output Compare Flags A and B (OCFA, OCFB)................................ 334
11.3.7 Setting of FRC Overflow Flag (OVF) ................................................................. 335
11.3.8 Automatic Addition of OCRA and OCRAR/OCRAF ......................................... 335
11.3.9 ICRD and OCRDM Mask Signal Generation ...................................................... 336
12.1.1 Features................................................................................................................ 345
12.1.2 Block Diagram ..................................................................................................... 347
12.1.3 Pin Configuration................................................................................................. 348
12.1.4 Register Configuration......................................................................................... 349
..................................................................................................... 345
......................................................................... 309

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