h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 548

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 16 I
Bit 3—Flash Memory Control Register Enable (FLSHE): Controls the access of CPU to the
flash memory control registers, the power-down mode control registers, and the supporting
module control registers. See section 3.2.4, Serial Timer Control Register (STCR).
Bit 2—Reserved: Do not write 1 to this bit.
Bits 1 and 0—Internal Clock Source Select 1 and 0 (ICKS1, ICSK0): These bits, together with
bits CKS2 to CKS0 in TCR, select the clock input to the timer counters (TCNT). For details, see
section 12.2.4, Timer Control Register (TCR).
16.2.8
DDCSWR is an 8-bit readable/writable register that controls the IIC channel 0 automatic format
switching function and IIC internal latch clearance.
DDCSWR is initialized to H'0F by a reset and in hardware standby mode.
Bit 7—DDC Mode Switch Enable (SWE): Selects the function for automatically switching IIC
channel 0 from formatless mode to the I
Bit 7
SWE
0
1
Rev. 3.00 Jan 18, 2006 page 520 of 1044
REJ09B0280-0300
Bit
Initial value
Read/Write
Notes: 1. Only 0 can be written, to clear the flag.
DDC Switch Register (DDCSWR)
2. Always read as 1.
Description
Automatic switching of IIC channel 0 from formatless mode to I
format is disabled
Automatic switching of IIC channel 0 from formatless mode to I
enabled
2
C Bus Interface
SWE
R/W
7
0
R/W
SW
6
0
R/W
2
C bus format.
IE
5
0
R/(W)
IF
4
0
*1
CLR3
W
3
1
*2
CLR2
W
2
1
*2
2
2
C bus
C bus format is
CLR1
W
1
1
*2
(Initial value)
CLR0
W
0
1
*2

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