h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 585

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Notes on TRS Bit Setting and ICDR Register Access
Conditions to cause this failure
Low-fixation of the SCL pins is cancelled incorrectly when the following conditions are
satisfied.
Restriction
Please carry out the following countermeasures when transmitting/receiving via the IIC bus
interface module.
(1) Please read the ICDR registers in receive mode, and write them in transmit mode.
(2) In receiving operation with master mode, please issue the start condition after clearing the
Master mode
Figure 16.26 shows the notes on ICDR reading (TRS = 1) in master mode.
(1) When previously received 2-bytes data remains in ICDR unread (ICDRS are full).
(2) Reads ICDR register after switching to transmit mode (TRS = 1). (RDRF = 0 state)
(3) Sets to receive mode (TRS = 0), after transmitting Rev.1 frame of issued start condition
Slave mode
Figure 16.27 shows the notes on ICDR writing (TRS = 0) in slave mode.
(1) Writes ICDR register in receive mode (TRS = 0), after entering the start condition by
internal flag of the IIC bus interface module, using CLR3 to CLR0 bit of the DDCSWR
register on bus-free state (BBSY = 0).
by master mode.
slave mode (TDRE = 0 state).
Address match with Rev.1 frame, receive 1 by R/W bit, and switches to transmit mode
(TRS = 1).
When these conditions are satisfied, the low fixation of the SCL pins is cancelled
without ICDR register access after Rev.1 frame is transferred.
Rev. 3.00 Jan 18, 2006 page 557 of 1044
Section 16 I
REJ09B0280-0300
2
C Bus Interface