h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 644

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 18B Host Interface LPC Interface (LPC)
18B.2.3 Host Interface Control Registers 2 and 3 (HICR2, HICR3)
Bit
Initial value
Slave Read/Write
Host Read/Write
Note:
Bit
Initial value
Slave Read/Write
Host Read/Write
HICR2 and HICR3 contain flags and bits that control interrupts from the host interface (LPC)
module to the slave processor, and bits that monitor host interface pin states.
Bits 6 to 0 of HICR2 are initialized to H'00 by a reset and in hardware standby mode. The states of
the other bits are determined by the pin states.
HICR2 Bit 7—GA20 Pin Monitor (GA20)
HICR3 Bit 7—LFRAME
HICR3 Bit 6—CLKRUN
HICR3 Bit 5—SERIRQ Pin Monitor (SERIRQ)
HICR3 Bit 4—LRESET
HICR3 Bit 3—LPCPD
HICR3 Bit 2—PME
HICR3 Bit 1—LSMI
HICR3 Bit 0—LSCI Pin Monitor (LSCI)
These are pin state monitoring bits. The pin states can be monitored regardless of the host
interface operating state or the operating state of the functions that use pin multiplexing.
Rev. 3.00 Jan 18, 2006 page 616 of 1044
REJ09B0280-0300
HICR2
HICR3
* Only 0 can be written to bits 6 to 4, to clear the flags.
LFRAME
LFRAME Pin Monitor (LFRAME)
CLKRUN
CLKRUN Pin Monitor (CLKRUN)
LRESET Pin Monitor (LRESET)
LRESET
LPCPD
LPCPD Pin Monitor (LPCPD)
PME
PME Pin Monitor (PME)
LSMI Pin Monitor (LSMI)
LSMI
LFRAME
CLKRUN
LRESET
LPCPD
PME
LSMI
LFRAME CLKRUN SERIRQ LRESET LPCPD
GA20
R
R
7
0
7
0
R/(W) *
LRST
R
6
0
6
0
R/(W) *
SDWN
R
5
0
5
0
R/(W) *
ABRT
R
4
0
4
0
IBFIE3
R/W
R
3
0
3
0
IBFIE2
PME
R/W
R
2
0
2
0
IBFIE1
LSMI
R/W
R
1
0
1
0
ERRIE
LSCI
R/W
R
0
0
0
0

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