h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 746

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 22 ROM
Error protection is released only by a reset and in hardware standby mode.
Figure 22.14 shows the flash memory state transition diagram.
Rev. 3.00 Jan 18, 2006 page 718 of 1044
REJ09B0280-0300
When a SLEEP instruction (including software standby, sleep, subactive, subsleep and watch
mode) is executed during programming/erasing
When the bus is released during programming/erasing
Legend:
RD: Memory read possible
VF: Verify-read possible
PR: Programming possible
ER: Erasing possible
Notes: 1. When an error occurs other than due to a SLEEP instruction, or when a SLEEP instruction is
RD VF PR ER FLER = 0
Normal operation mode
2. When an error occurs due to a SLEEP instruction (except subactive mode)
3. Except sleep mode
4. VF in subactive mode
Program mode
occurrence
RD VF
Erase mode
executed for a transition to subactive mode
Error protection mode
*4
Error
PR ER FLER = 1
*1
Figure 22.14 Flash Memory State Transitions
Error occurrence
RD: Memory read not possible
VF: Verify-read not possible
PR: Programming not possible
ER: Erasing not possible
RES = 0 or STBY = 0
Software standby,
sleep, subsleep, and
watch mode
Software standby,
sleep, subsleep, and
watch mode release
*2
RES = 0 or
STBY = 0
sleep, subsleep, and watch )
mode (software standby,
RD VF PR ER FLER = 1
RES = 0 or
STBY = 0
Error protection
FLMCR1, FLMCR2 (except
FLER bit), EBR1, EBR2
initialization state
Reset or hardware standby
RD VF PR ER FLER = 0
(hardware protection)
FLMCR1,
FLMCR2,
EBR1, EBR2
initialization
state
*3

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