h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 189

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
6.5
6.5.1
With the H8S/2169 or H8S/2149, external space area 0 can be designated as burst ROM space,
and burst ROM interfacing can be performed.
External space can be designated as burst ROM space by means of the BRSTRM bit in BCR.
Consecutive burst accesses of a maximum of 4 words or 8 words can be performed for CPU
instruction fetches only. One or two states can be selected for burst access.
6.5.2
The number of states in the initial cycle (full access) of the burst ROM interface is in accordance
with the setting of the AST bit. Also, when the AST bit is set to 1, wait state insertion is possible.
One or two states can be selected for the burst cycle, according to the setting of the BRSTS1 bit in
BCR. Wait states cannot be inserted.
When the BRSTS0 bit in BCR is cleared to 0, burst access of up to 4 words is performed; when
the BRSTS0 bit is set to 1, burst access of up to 8 words is performed.
The basic access timing for burst ROM space is shown in figures 6.14 (a) and (b). The timing
shown in figure 6.14 (a) is for the case where the AST and BRSTS1 bits are both set to 1, and that
in figure 6.14 (b) is for the case where both these bits are cleared to 0.
Burst ROM Interface
Overview
Basic Timing
Rev. 3.00 Jan 18, 2006 page 161 of 1044
Section 6 Bus Controller
REJ09B0280-0300

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