cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 350

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cn8237

Manufacturer Part Number
cn8237
Description
Atm Oc-12 Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet

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Figure 16-1. PCI Bus Input Timing Measurement Conditions
16.0 Electrical and Mechanical Specifications
16.1 Timing
Table 16-2. 66 MHz and 33 MHz Timing Parameters
16-2
NOTE(S):
1. REQ* and GNT* are point-to-point signals and have different input setup times than do bused signals. GNT# and REC# have
2. RST* is asserted and deasserted asynchronously with respect to CLK.
3. All output drivers must be floated when RST* is active.
4. When M66EN is asserted, the minimum specification for
5. For purposes of Active/Float timing measurements, the Hi-Z or "off" state is defined to be when the total current delivered
Symbol
t
t
val
su
t
t
rst–clk
a setup of 5 ns at 66 MHz. All other signals are bused.
mechanism is provided to guarantee a minimum value of 2 ns when M66EN is deasserted.
through the component pin is less than or equal to the leakage current specification.
rst–off
t
t
t
t
t
t
t
(ptp)
rrsu
(ptp)
t
rrh
val
on
off
rst
su
h
CLK to Signal Valid Delay—bused signals
CLK to Signal Valid Delay—point to point
signals
Float to Active Delay
Active to Float Delay
Input Set up Time to CLK—bused signals
Input Set up Time to CLK—point-to-point
signals
Input Hold Time from CLK
Reset Active Time after power stable
Reset Active Time after CLK stable
Reset Active to output float delay
REQ64* to RST* setup time
RST* to REQ64* hold time
HCLK
Input
Parameter
Mindspeed Technologies
t
T
t
cyc
low
t
val
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
su
10T
Min
100
(min)
2
2
2
3
5
0
1
0
cyc
66 MHz
,
t
t
h
T
high
val
(ptp)(min)
Max
14
40
50
6
6
, and T
10, 12
10T
Min
100
2
2
2
7
0
1
0
cyc
on
33 MHz
may be reduced to 1 ns if a
Max
11
12
28
40
50
Units
28237-DSH-001-C
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
CN8237
Notes
1, 4
1, 4
4, 5
2, 3
5
1
1
2
2
8237_103

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