cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 130

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

5.0 Reassembly Coprocessor
5.4 Buffer Management
5.4.9 Virtual FIFO Buffer Mode
5-22
5.4.8.5 Time-Out Period
5.4.8.4 Reassembly
Time-Out Condition
5.4.9.2 Operation
5.4.9.3 Errors
5.4.9.1 Setup
Calculation
The CN8237 reports reassembly time-out conditions via the VCC’s reassembly
status queue. The TO bit in the STATUS field of the status queue entry is set to
one. In Message Mode, the BD_PNTR points to the beginning of the partial
buffer descriptor chain. In Streaming Mode, the BD_PNTR points to the last
buffer descriptor in the chain. The only other valid fields in the status queue entry
are VCC_INDEX and VLD.
to begin accepting a CPCS-PDU.
The following equation determines the time-out period of a VCC:
VCCs that require time-out processing.
This mode provides a logical FIFO buffer port for cell data to host memory. Its
principal use is for AAL0 CBR voice traffic.
To enable this mode on any channel, set FIFO_EN in the RSM VCC table to a
logic high. The user initializes the CBUFF_PNTR field in the RSM VCC table to
the address of the FIFO buffer port. The channel should also be configured for
AAL0 fixed length termination mode, with a termination length of one cell.
Whenever a buffer is required during reassembly in this mode, the
CBUFF_PNTR address is used without accessing the free buffer queue.
synchronization between status entries and cells in the FIFO buffer under FIFO
buffer overflow conditions.
When the FIFO buffer port is on the PCI bus, the CBUFF_PNTR address must be
on a 64 byte boundary, and a decode of any address in the 64 byte block accesses
the FIFO buffer. External circuitry must also ensure that only complete cells are
written into the host FIFO buffer.
64-byte aligned.
Once status has been reported, the CN8237 re-initializes the VCC table entry
RSM_TO_CNT must be greater than or equal to the maximum number of
No status entries are written in this mode because there is no way to maintain
The beginning of a cell transfer can be detected by the PCI address being
Mindspeed Technologies
Period = SYSCLK period x RSM_TO_PER x RSM_TO_CNT x
TERM_TOCNTx
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
™
28237-DSH-001-C
CN8237