cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 210

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

6.0 Traffic Management
6.5 Traffic Management Control and Status Structures
6.5.7 Scheduler Internal SRAM Registers
Figure 6-23. Head and Tail Pointers
Table 6-26. Scheduler Internal SRAM Memory Map (Head/Tail Pointers)
6-54
0x1640-0x1643
0x1644-0x1647
0x1648-0x164B
0x164C-0x164F
0x1650-0x1653
0x1654-0x1657
0x1658-0x165B
0x165C-0x165F
0x1660-0x1663
0x1664-0x1667
0x1668-0x166B
0x166C-0x166F
0x1670-0x1673
0x1674-0x1677
0x1678-0x167B
0x167C-0x167F
0x1680-0x17FF
Address
31
PRI_PNTR3
PRI_PNTR7
PRI_PNTR10
PRI_PNTR11
PRI_PNTR12
PRI_PNTR13
PRI_PNTR14
PRI_PNTR15
PRI_PNTR0
PRI_PNTR1
PRI_PNTR2
PRI_PNTR4
PRI_PNTR5
PRI_PNTR6
PRI_PNTR8
PRI_PNTR9
Reserved
Name
Head
NOTE:
Scheduler SRAM registers are located in the address range 0x1640–0x17FF.
Figure 6-23
the memory map of these registers.
FOR SAR INTERNAL USE ONLY!
Application program should ignore these registers.
Mindspeed Technologies
shows the layout for the head and tail pointers.
16 15
Global priority 0.
Global priority 1.
Global priority 2.
Global priority 3.
Global priority 4.
Global priority 5.
Global priority 6.
Global priority 7.
Global priority 8.
Global priority 9.
Global priority 10.
Global priority 12.
Global priority 13.
Global priority 14.
Not implemented.
Global priority 11.
Global priority 15.
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
Tail
0
™
Description
8237_166
Table 6-26
28237-DSH-001-C
describes
CN8237