cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 199

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8237
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
6.5.1 Schedule Table
28237-DSH-001-C
Table 6-6. Schedule Slot Entry—CBR/Tunnel Traffic
NOTE(S):
(1)
(2)
6.4.2.1 Configuring the
1-7
Link for GFC Operation
Word
Word 1 is present only when the DBL_SLOT field in SEG_CTRL is set and USE_SCH_CTRL is not asserted, meaning two words
per schedule slot.
When USE_SCH_CTRL is asserted, the value of SLOT_DEPTH determines how many additional words are used in each
schedule slot; from 0 to 7 additional words.
0
(1)(2)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
The following example describes a sequence of how to auto-configure a link for
GFC operation after the link has been initialized:
6.5 Traffic Management Control and Status Structures
At initialization, all words in the entire Schedule table space should be written to
0xFFFFFFFF. Individual schedule slot entries can then be initialized as either
CBR slots or Tunnel slots as needed. The two formats are displayed in
CBR_TUN_ID
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Host sets a software GFC initialization timer = 0.
Disable reassembly coprocessor by setting RSM_CTRL0(RSM_EN) = 0.
Set the framer chip to pass unassigned cells.
Enable the GFC link interrupt (GFC_LINK), by setting HOST_IMASK0
(EN_GFC_LINK) = 1.
Read HOST_ISTAT0 register twice to clear it.
Enable the reassembly coprocessor and set the GFC initialization timer to
some user-assigned value.
Upon occurrence of an interrupt and before the GFC initialization timer
expires, read HOST_ISTAT0. If GFC_LINK is a logic high, continue. If
the timer expires before GFC_LINK is detected, do not enable the link for
GFC processing.
Set SEG_CTRL(SEG_GFC) to a logic high.
Set the GFCn bit(s) in the SCH_PRI register to enable the appropriate
priority queue(s) for GFC-controlled operation.
Set the framer chip to generate unassigned cells with GFC field in cell
headers set to the value of 0001.
Mindspeed Technologies
(Reserved for 2 16-bit VBR/ABR pointers)
6.5 Traffic Management Control and Status Structures
™
(Reserved for 1 VBR/ABR pointer)
6.0 Traffic Management
Table
6-6.
6-43