cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 129

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8237
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
5.4.8 Hardware PDU Time-Out
28237-DSH-001-C
5.4.8.1 Reassembly
Time-Out Processing
5.4.8.3 Timer Reset
Time-Out Process
5.4.8.2 Halting
The CN8237 automatically detects active CPCS-PDU time-out for reassembly
channels. A PDU time-out occurs when a partially received PDU does not
complete within a set time period. When it detects this time-out condition, the
CN8237 provides a status queue indication to the host. This indication allows the
host to recover the buffers held by the partially completed PDU. The CN8237
supports up to eight reassembly time-out periods.
A background hardware process performs the reassembly time-out function. The
process is activated at a user-selected interval. The process is globally enabled by
setting the GTO_EN bit in the RSM_CTRL0 register. The RSM_TO register
controls the process activity once enabled. The process is activated every
RSM_TO_PER rising edges of SYSCLK on cell boundaries.
NOTE:
TO_VCC_INDEX. This is a 16-bit variable located at address 0x1350, in internal
SRAM. The host should initialize this register to 0 at system initialization.
in the VCC table entry. The host also assigns one of eight time-out periods to each
VCC by initializing the TO_INDEX field in the VCC table entry.
ACT_PDU, to see if time-out processing is enabled and necessary, respectively,
for the current connection. If either bit is 0, TO_VCC_INDEX is incremented by
one and compared to RSM_TO_CNT in the RSM_TO register. If
TO_VCC_INDEX = RSM_TO_CNT, then TO_VCC_INDEX is reset to 0 and the
time-out search is restarted at the beginning of the VCC table.
table entry. It then compares CUR_TOCNT to the time-out value selected,
TERM_TOCNTx, where x = TO_INDEX. TERM_TOCNT0 through
TERM_TOCNT7 are located at address 0x1340 through 0x134c in internal
SRAM. They must be initialized to appropriate values during system
initialization.
the current VCC. The CN8237 follows the procedure described in
Section
To halt time-out processing, the host "must" set the TO_LAST bit to one in the
RSM VCC table entry for the last VCC_INDEX that the host wishes to have
enabled for time-out processing. When the CN8237 detects this bit set to one, it
halts time-out processing.
the VCC will not be checked for a time-out condition. The CN8237 simply
increments TO_VCC_INDEX and compares it to RSM_TO_CNT. If they are
equal, TO_VCC_INDEX is reset to 0 and the full time-out processing is
re-enabled.
The CN8237 reassembly time-out process increments the CUR_TOCNT value. If
it reaches a threshold value, a time-out condition has occurred. In AAL5 and
AAL0, PTI termination modes, the reception of a non-EOM cell resets the
counter.
Each time the process is activated, it examines a single VCC, identified by
To enable hardware time-out on an individual VCC, the host must set TO_EN
The CN8237 checks the TO_EN bit and the active PDU indicator bit,
If both bits are set, the CN8237 increments CUR_TOCNT in the RSM VCC
If CUR_TOCNT = TERM_TOCNTx, a time-out condition has occurred on
When time-out processing is halted, the time-out process is still activated, but
GTO_EN set to 0 resets the internal time-out interrupt counter.
5.4.8.4.
Mindspeed Technologies
™
5.0 Reassembly Coprocessor
5.4 Buffer Management
5-21