cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 245
cn8237
Manufacturer Part Number
cn8237
Description
Atm Oc-12 Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8237.pdf
(415 pages)
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9.0 System Interface
9.1 System Clocking
PCI CLK is used as a reference to a PLL that generates several system clocks,
including SYSCLK, CLKD3, and PCLK. The PLL multiplier is programmable
from value of 4 to 10 register in PC configuration. The VCO frequency range is
200 MHz to 264 MHz. A system with a 66 MHz HCLK, will set the multiplier to
4 in order to generate a 264 MHz VCO frequency which in turn generates a
66 MHz SYSCLK, 33 MHz PCLK, and 44 MHz CLKD3 signals. The multiplier
value resides at address 0x40 of the PCI configuration space. The M66EN input
is used to determine the default value of the multiplier upon application of
HRST*. If logic high, the multiplier is set to 4 for operation with a 66 MHz PCI
clock. If logic low, it is set to 8 for operation with a 33 MHz PCI clock. After
system reset, the user may change the frequency by writing the PLL_MUL field
in the PCI configuration space. The resultant value should not exceed 66 MHz for
SYSCLK, 33 MHz for PCLK and 50 MHz for CLKD3 (if used to drive UTOPIA
clocks).
9.2 Real-Time Clock Alarm
A real-time clock counter and alarm registers are built into the CN8237. This
real-time clock consists simply of a 7-bit prescaler (configured via the DIVIDER
field in the CONFIG0 register) that accepts the SYSCLK input and outputs a
constant (nominally 1 MHz) pulse train, and a 32-bit read/write counter (the
Real-Time Clock register [CLOCK;0x00]), that counts the number of pulses
output by the prescaler since the system was initialized. When the prescaler is set
to generate a 1 MHz pulse train, the CLOCK counter counts in 1 s intervals. An
interrupt is generated when the CLOCK counter overflows, that is, more than
32
2
pulses have occurred since it was cleared to zero. If this happens, the CLOCK
counter simply wraps around to zero and starts counting over. The control
processor or host software is responsible for noting the overflow.
Mindspeed Technologies
28237-DSH-001-C
™
9-1
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