attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 92

• Manufacturer Part Number: attiny167-esxz
• Description: 8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
• Manufacturer: ATMEL Corporation

10.8
92
Timer/Counter Timing Diagrams
ATtiny167
Figure 10-7. Phase Correct PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches BOTTOM. The
interrupt flag can be used to generate an interrupt each time the counter reaches the BOTTOM
value.
In phase correct PWM mode, the compare unit allows generation of PWM waveforms on the
OC0A pin. Setting the COM0A1:0 bits to two will produce a non-inverted PWM. An inverted
PWM output can be generated by setting the COM0A1:0 to three (See
The actual OC0A value will only be visible on the port pin if the data direction for the port pin is
set as output. The PWM waveform is generated by clearing (or setting) the OC0A Register at the
compare match between OCR0A and TCNT0 when the counter increments, and setting (or
clearing) the OC0A Register at compare match between OCR0A and TCNT0 when the counter
decrements. The PWM frequency for the output when using phase correct PWM can be calcu-
lated by the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR0A Register represent special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCR0A is set equal to BOTTOM, the
output will be continuously low and if set equal to MAX the output will be continuously high for
non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
The following figures show the Timer/Counter in synchronous mode, and the timer clock (clk
is therefore shown as a clock enable signal. In asynchronous mode, clk
the Timer/Counter Oscillator clock. The figures include information on when interrupt flags are
set.
count sequence close to the MAX value in all modes other than phase correct PWM mode.
Figure 10-8
TCNTn
OCnx
OCnx
Period
contains timing data for basic Timer/Counter operation. The figure shows the
1
f
OCnxPCPWM
2
=
----------------- -
N 510
f
clk_I/O
⋅
3
I/O
Table 10-3 on page
should be replaced by
OCnx Interrupt Flag Set
OCRnx Update
TOVn Interrupt Flag Set
(COMnx1:0 = 2)
(COMnx1:0 = 3)
7728A–AUTO–07/08
97).
T0
)