attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 128
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attiny167-esxz
Manufacturer Part Number
attiny167-esxz
Description
8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
Manufacturer
ATMEL Corporation
Datasheet
1.ATTINY167-ESXZ.pdf
(277 pages)
- Current page: 128 of 277
- Download datasheet (4Mb)
Table 12-4.
Note:
12.11.2
128
Mode
13
14
15
1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the
WGM13
ATtiny167
Timer/Counter1 Control Register B – TCCR1B
location of these bits are compatible with previous versions of the timer.
1
1
1
Waveform Generation Mode Bit Description
WGM12
(CTC1)
1
1
1
• Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is
activated, the input from the Input Capture pin (ICP1) is filtered. The filter function requires four
successive equal valued samples of the ICP1 pin for changing its output. The Input Capture is
therefore delayed by four Oscillator cycles when the noise canceler is enabled.
• Bit 6 – ICES1: Input Capture Edge Select
This bit selects which edge on the Input Capture pin (ICP1) that is used to trigger a capture
event. When the ICES1 bit is written to zero, a falling (negative) edge is used as trigger, and
when the ICES1 bit is written to one, a rising (positive) edge will trigger the capture.
When a capture is triggered according to the ICES1 setting, the counter value is copied into the
Input Capture Register (ICR1). The event will also set the Input Capture Flag (ICF1), and this
can be used to cause an Input Capture Interrupt, if this interrupt is enabled.
When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in the
TCCR1A and the TCCR1B Register), the ICP1 is disconnected and consequently the Input
Capture function is disabled.
• Bit 5 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be
written to zero when TCCR1B is written.
• Bit 4:3 – WGM13:2: Waveform Generation Mode
See TCCR1A Register description.
• Bit 2:0 – CS12:0: Clock Select
Bit
Read/Write
Initial Value
(PWM11)
WGM11
0
1
1
ICNC
R/W
(PWM10)
7
0
WGM10
1
1
0
1
ICES
R/W
6
0
1
Timer/Counter
Mode of Operation
(Reserved)
Fast PWM
Fast PWM
(1)
(Continued)
R
5
–
0
WGM
R/W
4
0
1
WGM
3
WGM
12:0 definitions. However, the functionality and
R/W
3
0
1
2
TOP
–
ICR1
OCR1A
CS
R/W
2
0
1
2
Update of
OCR1A/B at
–
TOP
TOP
CS
R/W
1
0
1
1
CS
R/W
0
0
7728A–AUTO–07/08
1
0
TOV1 Flag
Set on
–
TOP
TOP
TCCR
1
B
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