attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 179

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attiny167-esxz

Manufacturer Part Number
attiny167-esxz
Description
8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
Manufacturer
ATMEL Corporation
Datasheet
15.6.9
15.6.10
7728A–AUTO–07/08
LIN Data Buffer Selection Register - LINSEL
LIN Data Register - LINDAT
• Bits 7:4 - Reserved Bits
• Bit 3 - LAINC: Auto Increment of Data Buffer Index
• Bits 2:0 - LINDX 2:0: FIFO LIN Data Buffer Index
• Bits 7:0 - LDATA[7:0]: LIN Data In / Data out
Initial Value
Initial Value
Read/Write
Read/Write
written to zero when LINSEL is written.
FIFO data buffer is accessed through LINDAT.
Bit
Bit
These bits are reserved for future use. For compatibility with future devices, they must be
In LIN mode:
In UART mode this field is unused.
In LIN mode: location (index) of the LIN response data byte into the FIFO data buffer. The
In UART mode this field is unused.
In LIN mode: FIFO data buffer port.
In UART mode: data register (no data buffer - no FIFO).
0 = Auto incrementation of FIFO data buffer index (default),
1 = No auto incrementation.
In Write access, data out.
In Read access, data in.
LDATA7
R/W
7
7
0
-
-
-
LDATA6
R/W
6
6
0
-
-
-
LDATA5
R/W
5
5
0
-
-
-
LDATA4
R/W
4
4
0
-
-
-
LDATA3
LAINC
R/W
R/W
3
0
3
0
LDATA2
LINDX2
R/W
R/W
2
0
2
0
LDATA1
LINDX1
R/W
R/W
1
0
1
0
ATtiny167
LDATA0
LINDX0
R/W
R/W
0
0
0
0
LINSEL
LINDAT
179

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