attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 124

• Manufacturer Part Number: attiny167-esxz
• Description: 8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
• Manufacturer: ATMEL Corporation

12.10 Timer/Counter Timing Diagrams
124
ATtiny167
The N variable represents the prescaler divider (1, 8, 64, 256, or 1024).
The extreme values for the OCR1A/B Register represents special cases when generating a
PWM waveform output in the phase correct PWM mode. If the OCR1A/B is set equal to
BOTTOM the output will be continuously low and if set equal to TOP the output will be set to
high for non-inverted PWM mode. For inverted PWM the output will have the opposite logic
values.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when interrupt
flags are set, and when the OCR1A/B Register is updated with the OCR1A/B buffer value (only
for modes utilizing double buffering).
OCF1A/B.
Figure 12-11. Timer/Counter Timing Diagram, Setting of OCF1A/B, no Prescaling
Figure 12-12
Figure 12-12. Timer/Counter Timing Diagram, Setting of OCF1A/B, with Prescaler (f
Figure 12-13
frequency correct PWM mode the OCR1A/B Register is updated at BOTTOM. The timing dia-
grams will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and
so on. The same renaming applies for modes that set the TOV1 flag at BOTTOM.
OCRnx
TCNTn
OCFnx
OCRnx
(clk
TCNTn
OCFnx
(clk
shows the same timing data, but with the prescaler enabled.
shows the count sequence close to TOP in various modes. When using phase and
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/1)
/8)
OCRnx - 1
OCRnx - 1
Figure 12-11
OCRnx
OCRnx
OCRnx Value
OCRnx Value
shows a timing diagram for the setting of
OCRnx + 1
OCRnx + 1
T1
) is therefore shown as a
OCRnx + 2
OCRnx + 2
7728A–AUTO–07/08
clk_I/O
/8)