attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 31

• Manufacturer Part Number: attiny167-esxz
• Description: 8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
• Manufacturer: ATMEL Corporation

4.3.2.2
4.3.2.3
4.3.3
4.3.4
4.3.5
7728A–AUTO–07/08
Enable/Disable Clock Source
COUT Command
Clock Availability
Source Selection
Source Recovering
The available codes of clock source are given in
Figure 4-5.
The CLKSELR register contains the CSEL, CSUT and COUT values which will be used by the
‘Enable/Disable Clock Source’, ‘Request for Clock Availability’ or ‘Clock Source Switching’
commands.
The ‘Recover System Clock Source’ command updates the CKSEL field of CLKSELR register
(See Section “4.3.6” on page
The ‘Enable Clock Source’ command selects and enables a clock source configured by the set-
tings in the CLKSELR register. CSEL3..0 will select the clock source and CSUT1:0 will select the
start-up time (just as CKSEL and SUT fuse bits do). To be sure that a clock source is operating,
the ‘Request for Clock Availability ’ command must be executed after the ‘Enable Clock Source’
command. This will indicate via the CLKRDY bit in the CLKCSR register that a valid clock source
is available and operational.
The ‘Disable Clock Source’ command disables the clock source indicated by the settings of
CLKSELR register (only CSEL3..0). If the clock source indicated is currently the one that is used
to drive the system clock, the command is not executed.
Because the selected configuration is latched at clock source level, it is possible to enable many
clock sources at a given time (ex: the internal RC oscillator for system clock + an oscillator with
external crystal). The user (code) is responsible of this management.
The ‘CKOUT ’ command allows to drive the CLKO pin. Refer to
Buffer” on page 30
‘Request for Clock Availability’ command enables a hardware oscillation cycle counter driven by
the selected source clock, CSEL3..0. The count limit value is determined by the settings of
Fuse Low Byte
SCLKRq
Fuses substitution and Clock Source Selection
Fuse:
(
*
)
: Command of Clock Control & Status Register
for using.
SCLKRq
Reset
(
*
)
32.).
CLKSELR
Register:
CKSEL[3..0]
SUT[1..0]
Table 4-1 on page
SEL-0
SEL-1
SEL-2
SEL-n
CKOUT
EN-0
EN-1
EN-2
EN-n
Section 4.2.7 ”Clock Output
24.
Configuration
Configuration
Selected
Current
Switch
Clock
ATtiny167
31