attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 46

• Manufacturer Part Number: attiny167-esxz
• Description: 8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
• Manufacturer: ATMEL Corporation

5.9.3
46
ATtiny167
PRR – Power Reduction Register
The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed
while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is
automatically cleared after three clock cycles.
• Bit 5 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD disable
is controlled by a timed sequence.
• Bit 7 - Res: Reserved bit
This bit is reserved in ATtiny167 and will always read as zero.
• Bit 6 - Res: Reserved bit
This bit is reserved in ATtiny167 and will always read as zero.
• Bit5 - PRLIN: Power Reduction LIN / UART controller
Writing a logic one to this bit shuts down the LIN by stopping the clock to the module. When
waking up the LIN again, the LIN should be re initialized to ensure proper operation.
• Bit 4 - PRSPI: Power Reduction Serial Peripheral Interface
If using debugWIRE On-chip Debug System, this bit should not be written to one.
Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to
the module. When waking up the SPI again, the SPI should be re initialized to ensure proper
operation.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
• Bit 2 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module in synchronous mode (AS0
is 0). When the Timer/Counter0 is enabled, operation will continue like before the shutdown.
• Bit 1 - PRUSI: Power Reduction USI
Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When
waking up the USI again, the USI should be re-initialized to ensure proper operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
Bit
Read/Write
Initial Value
R/W
7
–
0
R
6
–
0
PRLIN
R/W
5
0
PRSPI
R/W
4
0
PRTIM1
R/W
3
0
PRTIM0
R/W
2
0
PRUSI
R/W
1
0
PRADC
7728A–AUTO–07/08
R/W
0
0
PRR