attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 85

• Manufacturer Part Number: attiny167-esxz
• Description: 8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
• Manufacturer: ATMEL Corporation

10.2.1
10.3
10.4
7728A–AUTO–07/08
Timer/Counter Clock Sources
Counter Unit
Definitions
The following definitions are used extensively throughout the section:
The Timer/Counter can be clocked by an internal synchronous or an external asynchronous
clock source. The clock source is selected by the clock select logic which is controlled by the
clock select (CS02:0) bits located in the Timer/Counter control register (TCCR0).The clock
source clk
is written to logic one, the clock source is taken from the Timer/Counter Oscillator connected to
XTAL1 and XTAL2 or directly from XTAL1. For details on asynchronous operation, see
chronous Status Register – ASSR” on page
”Timer/Counter0 Prescaler” on page
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
10-2
Figure 10-2. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk
selected by the Clock Select bits (CS02:0). When no clock source is selected (CS02:0 = 0) the
BOTTOM
MAX
TOP
shows a block diagram of the counter and its surrounding environment.
count
direction
clear
clk
top
bottom
T0
T0
DATA BUS
is by default equal to the MCU clock, clk
TCNTn
The counter reaches the BOTTOM when it becomes zero (0x00).
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is depen-
dent on the mode of operation.
T0
). clk
Increment or decrement TCNT0 by 1.
Selects between increment and decrement.
Clear TCNT0 (set all bits to zero).
Timer/Counter0 clock.
Signalizes that TCNT0 has reached maximum value.
Signalizes that TCNT0 has reached minimum value (zero).
T0
direction
count
can be generated from an external or internal clock source,
clear
bottom
96.
Control Logic
99. For details on clock sources and prescaler, see
top
TOVn
(Int.Req.)
clk
Tn
I/O
Prescaler
. When the AS0 bit in the ASSR Register
clk
TnS
ATtiny167
Oscillator
clk
I/O
XTAL2
XTAL1
”Asyn-
Figure
85