attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 186
attiny167-esxz
Manufacturer Part Number
attiny167-esxz
Description
8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
Manufacturer
ATMEL Corporation
Datasheet
1.ATTINY167-ESXZ.pdf
(277 pages)
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17.5
186
Prescaling and Conversion Timing
ATtiny167
even if the specific interrupt is disabled or the Global Interrupt Enable bit in SREG register is
cleared. A conversion can thus be triggered without causing an interrupt. However, the Interrupt
Flag must be cleared in order to trigger a new conversion at the next interrupt event.
Figure 17-2. ADC Auto Trigger Logic
Using the ADC Interrupt Flag as a trigger source makes the ADC start a new conversion as soon
as the ongoing conversion has finished. The ADC then operates in Free Running mode, con-
stantly sampling and updating the ADC Data Register. The first conversion must be started by
writing a logical one to the ADSC bit in ADCSRA register. In this mode the ADC will perform suc-
cessive conversions independently of whether the ADC Interrupt Flag, ADIF is cleared or not.
If Auto Triggering is enabled, single conversions can be started by writing ADSC in ADCSRA
register to one. ADSC can also be used to determine if a conversion is in progress. The ADSC
bit will be read as one during a conversion, independently of how the conversion was started.
Figure 17-3. ADC Prescaler
By default, the successive approximation circuitry requires an input clock frequency between 50
kHz and 200 kHz to get maximum resolution. If a lower resolution than 10 bits is needed, the
input clock frequency to the ADC can be higher than 200 kHz to get a higher sample rate.
The ADC module contains a prescaler, which generates an acceptable ADC clock frequency
from any CPU frequency above 100 kHz. The prescaling is set by the ADPS bits in ADCSRA
register. The prescaler starts counting from the moment the ADC is switched on by setting the
SOURCE 1
SOURCE n
. . .
. . .
. . .
. . .
ADSC
ADIF
CLK
ADEN
Start
ADTS[2:0]
IO
ADPS0
ADPS1
ADPS2
Detector
Edge
ADATE
Reset
7-bit ADC Prescaler
Start
ADC Prescaler
Conversion
CLK
Logic
CLK
IO
ADC
7728A–AUTO–07/08
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