attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 84

no-image

attiny167-esxz

Manufacturer Part Number
attiny167-esxz
Description
8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
Manufacturer
ATMEL Corporation
Datasheet
84
ATtiny167
Figure 10-1. 8-bit Timer/Counter0 Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers. Inter-
rupt request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register
(TIFR0). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK0).
TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously clocked from
the XTAL1/2 pins, as detailed later in this section. The asynchronous operation is controlled by
the Asynchronous Status Register (ASSR). The Clock Select logic block controls which clock
source the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inac-
tive when no clock source is selected. The output from the Clock Select logic is referred to as the
timer clock (clk
The double buffered Output Compare Register (OCR0A) is compared with the Timer/Counter
value at all times. The result of the compare can be used by the Waveform Generator to gener-
ate a PWM or variable frequency output on the Output Compare pin (OC0A).
Compare Unit” on page 86.
(OCF0A) which can be used to generate an Output Compare interrupt request.
Status flags
T0
).
Timer/Counter
TCNTn
OCRnx
=
for details. The compare match event will also set the compare flag
ASSRn
direction
count
clear
BOTTOM
Synchronized Status flags
= 0
Control Logic
=
TCCRnx
TOP
asynchronous mode
0xFF
select (ASn)
clk
Tn
Synchronization Unit
Prescaler
OCnx
(Int.Req.)
Generation
Waveform
Oscillator
7728A–AUTO–07/08
OCnx
clk
TOVn
(Int.Req.)
clk
clk
See ”Output
ASY
I/O
I/O
XTAL1
XTAL2

Related parts for attiny167-esxz