attiny167-esxz ATMEL Corporation, attiny167-esxz Datasheet - Page 20

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attiny167-esxz

Manufacturer Part Number
attiny167-esxz
Description
8-bit Avr 8-bit Microcontroller Microcontroller With 16k Bytes In-system Programmable Flash And Lin Controller
Manufacturer
ATMEL Corporation
Datasheet
3.4
3.4.1
3.5
3.5.1
20
I/O Memory
Register Description
ATtiny167
General Purpose I/O Registers
EEARH and EEARL – EEPROM Address Register
The I/O space definition of the ATtiny167 is shown in
257.
All ATtiny167 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The ATtiny167 is a complex
microcontroller with more peripheral units than can be supported within the 64 location reserved
in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in
SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny167 contains three General Purpose I/O Registers. These registers can be used for
storing any information, and they are particularly useful for storing global variables and Status
Flags.
The General Purpose I/O Registers within the address range 0x00 - 0x1F are directly bit-acces-
sible using the SBI, CBI, SBIS, and SBIC instructions.
• Bit 7:1 – Reserved Bits
These bits are reserved for future use and will always read as 0 in ATtiny167.
• Bits 8:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL – specifies the high EEPROM address
in the EEPROM space (see “E2 size” in
Bit
Bit
Read/Write
Read/Write
Initial Value
Initial Value
EEAR7
R/W
R
X
7
7
0
-
EEAR6
R/W
R
X
6
6
0
-
EEAR5
R/W
R
5
5
0
X
-
Table 3-1 on page
EEAR4
R/W
R
X
4
4
0
-
EEAR3
R/W
R
3
3
0
X
-
Section 25. ”Register Summary” on page
EEAR2
14). The EEPROM data bytes are
R/W
R
X
2
2
0
-
EEAR1
R/W
R
X
1
1
0
-
EEAR8
EEAR0
R/W
R/W
0
0
X
X
7728A–AUTO–07/08
EEARH
EEARL

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