ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 59

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

eZ80F92/eZ80F93
Product Specification
52
An example of WAIT state operation is displayed in
Figure
8. In this example, the Chip
Select is configured to provide a single WAIT state. The external peripheral being
accessed drives the WAIT pin Low to request assertion of an additional WAIT state. If the
WAIT pin is asserted for additional system clock cycles, WAIT states are added until the
WAIT pin is deasserted (High).
T
T
CLK
WAIT
X
IN
ADDR[23:0]
DATA[7:0]
(output)
CSx
MREQ
RD
INSTRD
Figure 8. Example: Wait State Operation Read Operation
Chip Selects During Bus Request/Bus Acknowledge Cycles
When the CPU relinquishes the address bus to an external peripheral in response to an
external bus request (BUSREQ), it drives the bus acknowledge pin (BUSACK) Low. The
external peripheral can then drive the address bus (and data bus). The CPU continues to
generate Chip Select signals in response to the address on the bus. External devices cannot
access the internal registers of the eZ80F92 device.
PS015313-0508
Chip Selects and Wait States