ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 110
ez80f92
Manufacturer Part Number
ez80f92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F92.pdf
(261 pages)
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PS015313-0508
CLK_SEL and FREQ_SEL select the RTC clock source. If the 32 kHz crystal option is
selected the oscillator is enabled and the internal clock divider is set to divide by 32768. If
the power-line frequency option is selected, the prescale value is set by FREQ_SEL, and
the 32 kHz oscillator is disabled. See
Table 51. Real-Time Clock Control Register; (RTC_CTRL = 00EDh)
Bit
Reset
CPU Access
Note: X = Unchanged by RESET; R = Read Only; R/W = Read/Write.
Bit
Position
7
ALARM
6
INT_EN
5
BCD_EN
4
CLK_SEL
3
FREQ_SEL
2
1
SLP_WAKE
0
RTC_UNLOCK
Value Description
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
Alarm interrupt is inactive.
Alarm interrupt is active.
Interrupt on alarm condition is disabled.
Interrupt on alarm condition is enabled.
RTC count and alarm value registers are binary.
RTC count and alarm value registers are binary-coded decimal
(BCD).
RTC clock source is crystal oscillator output (32768 Hz).
On-chip 32768 Hz oscillator is enabled.
RTC clock source is power-line frequency input.
On-chip 32768 Hz oscillator is disabled.
Power-line frequency is 60 Hz.
Power-line frequency is 50 Hz.
Reserved.
RTC does not generate a sleep-mode recovery reset.
RTC Alarm generates a sleep-mode recovery reset.
RTC count registers are locked to prevent Write access.
RTC counter is enabled.
RTC count registers are unlocked to allow Write access.
RTC counter is disabled.
R
X
7
R/W
6
0
Table
R/W
51.
X
5
R/W
X
4
R/W
X
3
Product Specification
X
R
2
Real-Time Clock
0/1
R
1
R/W
0
0
103
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