ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 187

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS015313-0508
Note:
Instruction Store 4:0 Registers
The ZDI Instruction Store registers are located in the ZDI Register Write Only address
space. They can be written with instruction data for direct execution by the CPU. When
the ZDI_IS0 register is written, the eZ80F92 device exits the ZDI BREAK state and exe-
cutes a single instruction. The Op Codes and operands for the instruction come from these
Instruction Store registers. The Instruction Store Register 0 is the first byte fetched, fol-
lowed by Instruction Store registers 1, 2, 3, and 4, as necessary. Only the bytes the proces-
sor requires to execute the instruction must be stored in these registers. Some CPU
instructions, when combined with the MEMORY mode suffixes (.SIS, .SIL, .LIS, or
.LIL), require 6 bytes to operate. These 6-byte instructions cannot be executed directly
using the ZDI Instruction Store registers. See
Table 101. Instruction Store 4:0 Registers(ZDI_IS4 = 21h, ZDI_IS3 = 22h, ZDI_IS2 =
23h, ZDI_IS1 = 24h, and ZDI_IS0 = 25h in the ZDI Register Write Only Address
Space)
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
Bit
Position
[7:0]
ZDI_IS4,
ZDI_IS3,
ZDI_IS2,
ZDI_IS1, or
ZDI_IS0
The Instruction Store 0 register is located at a higher ZDI address than the other
Instruction Store registers. This feature allows the use of the ZDI auto-address
increment function to load and execute a multibyte instruction with a single data
stream from the ZDI master. Execution of the instruction commences with writing
the most recent byte to ZDI_IS0.
Value Description
00h–
FFh
W
X
7
These registers contain the Op Codes and operands for
immediate execution by the CPU following a Write to
ZDI_IS0. The ZDI_IS0 register contains the first Op Code
of the instruction. The remaining ZDI_ISx registers contain
any additional Op Codes or operand dates required for
execution of the required instruction.
W
X
6
W
X
5
Table
101.
W
X
4
W
X
3
Product Specification
W
X
2
eZ80F92/eZ80F93
Zilog Debug Interface
W
X
1
W
X
0
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