ez80f92 ZiLOG Semiconductor, ez80f92 Datasheet - Page 143

• Manufacturer Part Number: ez80f92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS015313-0508
A Write to either the Low or High byte registers for the BRG Divisor Latch causes both
bytes to be loaded into the BRG counter and the count restarted. See
73.
Table 72. SPI Baud Rate Generator Register—Low Byte(SPI_BRG_L = 00B8h)
sterister is used to control and setup the serial peripheral interface. The SPI should be dis-
Table 73. SPI Baud Rate Generator Register—High Byte (SPI_BRG_H = 00B9h)
This register is used to control and setup the serial peripheral interface. The SPI should be
disabled prior to making any changes to CPHA or CPOL. See disabled prior to making
any changes to CPHA or CPOL. See
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
SPI_BRG_L
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
SPI_BRG_H
Value
00h–
FFh
Value
00h–
FFh
R/W
Description
These bits represent the Low byte of the 16-bit Baud Rate
Generator divider value. The complete BRG divisor value is
returned by {SPI_BRG_H, SPI_BRG_L}.
R/W
Description
These bits represent the High byte of the 16-bit Baud Rate
Generator divider value. The complete BRG divisor value is
returned by {SPI_BRG_H, SPI_BRG_L}.
7
0
7
0
R/W
R/W
6
0
6
0
Table 74
R/W
R/W
5
0
5
0
on page 137.
R/W
R/W
4
0
4
0
R/W
R/W
3
0
3
0
Product Specification
Serial Peripheral Interface
R/W
R/W
Table 72
2
0
2
0
eZ80F92/eZ80F93
R/W
R/W
1
1
1
0
and
Table
R/W
R/W
0
0
0
0
136