AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 62

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

62
AT90PWM81
regular program code can be placed at these locations. This is also the case if the Reset Vector is in the
Application section while the Interrupt Vectors are in the Boot section or vice versa.
Table 8-2.
Note:
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
AT90PWM81 is:
BOOTRST
Address Labels Code
0x000
0x001
0x002
0x003
0x004
0x005
0x006
0x007
0x008
0x009
0x00A
0x00B
0x00C
0x00D
0x00E
0x00F
0x010
0x011
0x012
0x013
0x014
0x015
0x016
0x017
0x018
0x019
0x01A
0x01B
0x01C
0x01F
;
1
1
0
0
1. The Boot Reset Address is shown in
unprogrammed while “0” means programmed.
Reset and Interrupt Vectors Placement in AT90PWM81
IVSEL
0
1
0
1
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
rjmp
Reset Address
0x000
0x000
Boot Reset Address
Boot Reset Address
RESET
PSC2_CAPT
PSC2_EC
PSC2_EEC
PSCR_CAPT
PSCR_EC
PSCR_EEC
ANA_COMP_0
ANA_COMP_1
ANA_COMP_2
EXT_INT0
TIM1_CAPT
TIM1_OVF
ADC
EXT_INT1
SPI_STC
EXT_INT2
WDT
EE_RDY
SPM_RDY
Table 20-7 on page
Comments
; Reset Handler
; PSC2 Capture event Handler
; PSC2 End Cycle Handler
; PSC2 End Enhanced Cycle Handler
; PSCr Capture event Handler
; PSC0 End Cycle Handler
; PSCr End Enhanced Cycle Handler
; Analog Comparator 0 Handler
; Analog Comparator 1 Handler
; Analog Comparator 2 Handler
; IRQ0 Handler
; Timer1 Capture Handler
; Timer1 Overflow Handler
; ADC Conversion Complete Handler
; IRQ1 Handler
; SPI Transfer Complete Handler
; IRQ2 Handler
; Watchdog Timer Handler
; EEPROM Ready Handler
; Store Program Memory Ready Handler
Interrupt Vectors Start Address
0x001
Boot Reset Address + 0x001
0x001
Boot Reset Address + 0x001
246. For the BOOTRST Fuse “1” means
(1)
7734P–AVR–08/10