AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 104
AT90PWM81
Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM81
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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Price
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12.5
12.5.1
104
Functional Description
AT90PWM81
Waveform Cycles
Note:
The waveform generated by PSC can be described as a sequence of two waveforms.
The first waveform is relative to PSCOUTn0 output and part A of PSC. The part of this waveform is sub-
cycle A in the following figure.
The second waveform is relative to PSCOUTn1 output and part B of PSC. The part of this waveform is
sub-cycle B in the following figure.
The complete waveform is ended with the end of sub-cycle B. It means at the end of waveform B.
Figure 12-4.
Figure 12-5.
Ramps illustrate the output of the PSC counter included in the waveform generators. Centered Mode is
like a one ramp mode which count down up and down.
Notice that the update of a new set of values is done regardless of ramp Mode at the top of the last ramp.
4 Ramp Mode
2 Ramp Mode
1 Ramp Mode
Centered Mode
1. See
2.
Ramp A0
See “Analog Synchronization” on page 130.
Cycle Presentation in 1, 2 & 4 Ramp Mode
Cycle Presentation in Centered Mode
Figure 12-41 on page 131
Sub-Cycle A
Ramp A
Ramp A1
PSC Cycle
Ramp B0
Sub-Cycle B
Ramp B
Ramp B1
PSC Cycle
UPDATE
UPDATE
7734P–AVR–08/10
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