AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 200
AT90PWM81
Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM81
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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16.4.4
200
AT90PWM81
Analog Comparator n Extended Control Register – ACnECON
Bit
Read/Write
Initial Value
• Bit 7..6– Reserved
• Bit 5– AC1OI: Analog Comparator n Output Invert
Set this bit to invert the analog comparator n output .
Clear this bit to keep the analog comparator n output .
• Bit 4– AC1OE: Analog Comparator n Output Enable
Set this bit to enable the analog comparator n output pin.
Clear this bit to disable the analog comparator n output pin.
• Bit 3 – AC1ICE: Analog Comparator 1 Interrupt Capture Enable bit
Set this bit to enable the input capture of the Timer/Counter1 on the analog comparator event. The com-
parator output is in this case directly connected to the input capture front-end logic, making the
comparator utilize the noise canceler and edge select features of the Timer/Counter1 Input Capture inter-
rupt. To make the comparator trigger the Timer/Counter1 Input Capture interrupt, the ICIE1 bit in the
Timer Interrupt Mask Register (TIMSK1) must be set.
In case ICES1 bit
edge of AC3O is the capture/trigger event of the Timer/Counter1, in case ICES1 is set to zero, it is the
falling edge which is taken into account.
Clear this bit to disable this function. In this case, no connection between the Analog Comparator and the
input capture function exists
• Bit 2, 1, 0– ACnH2, ACnH1, ACnH0: Analog Comparator n Hysteresis select
These 3 bits determine the hysteresis value of the analog comparator
The different setting are shown in
Table 16-7.
AC1M2
0
0
0
0
1
1
1
1
7
0
Analog Comparator n Hysteresis selection
AC1M1
0
0
1
1
0
0
1
1
(“Timer/Counter1 Control Register B – TCCR1B” on page
6
0
AC1M0
0
1
0
1
0
1
0
1
Table
R/W
5
ACnOI
0
16-7.
4
ACnOE
R/W
0
No Hysteresis
Hysteresis + 25 mV
Hysteresis - 25 mV
Hysteresis +- 25 mV
Description
Hysteresis + 10 mV
Hysteresis - 10 mV
Hysteresis +- 10 mV
Reserved
3
AC1ICE
R/W
0
2
ACnH2
R/W
0
R/W
1
ACnH1
0
96) is set high, the rising
0
R/W
0
ACnH0
7734P–AVR–08/10
ACnECON
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