AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 244

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20.7.11
20.7.12
20.7.13
244
AT90PWM81
Preventing Flash Corruption
Programming Time for Flash when Using SPM
Simple Assembly Code Example for a Boot Loader
During periods of low V
the CPU and the Flash to operate properly. These issues are the same as for board level systems using the
Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a regular
write sequence to the Flash requires a minimum voltage to operate correctly. Secondly, the CPU itself can
execute instructions incorrectly, if the supply voltage for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is sufficient):
The calibrated RC Oscillator is used to time Flash accesses.
time for Flash accesses from the CPU.
Table 20-6.
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
1.
2.
3.
2.See Note 3
3.Final Test Amb VRef HIGH BYTE and LOW BYTE :
Typical values arefor Vref. = 2.56V:
HIGH BYTE = 0x0A
LOW BYTE = 0x00
This means :
Final Test Amb VRef= 0x0A00 = 2560 = Vref. * 1000.
4.See Note 3 which details the value format.
5.See Note 3 which details the value format.
If there is no need for a Boot Loader update in the system, program the Boot Loader Lock bits to
prevent any Boot Loader software updates.
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This
can be done by enabling the internal Brown-out Detector (BOD) if the operating voltage
matches the detection level. If not, an external low V
reset occurs while a write operation is in progress, the write operation will be completed pro-
vided that the power supply voltage is sufficient.
Keep the AVR core in Power-down sleep mode during periods of low V
CPU from attempting to decode and execute instructions, effectively protecting the SPMCSR
Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the Boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
SPM Programming Time
Symbol
CC
, the Flash program can be corrupted because the supply voltage is too low for
Min Programming Time
3.7 ms
CC
Table 20-6
reset protection circuit can be used. If a
shows the typical programming
CC
Max Programming Time
. This will prevent the
4.5 ms
7734P–AVR–08/10