AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 17

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

4.2.1
7734P–AVR–08/10
SRAM Data Access Times
The AT90PWM81 is a complex microcontroller with more peripheral units than can be supported within
the 64 locations reserved in the Opcode for the IN and OUT instructions. For the Extended I/O space from
0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The lower 512 data memory locations address both the Register File, the I/O memory, Extended I/O mem-
ory, and the internal data SRAM. The first 32 locations address the Register File, the next 64 location the
standard I/O memory, then 160 locations of Extended I/O memory, and the next 256 locations address the
internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displacement, Indi-
rect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register File, registers R26 to
R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given by the Y-
or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-increment, the
address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Registers, and the 256
bytes of internal data SRAM in the AT90PWM81 are all accessible through all these addressing modes.
The Register File is described in
Figure 4-2.
This section describes the general access timing concepts for internal memory access. The internal data
SRAM access is performed in two clk
Data Memory Map
“General Purpose Register File” on page
CPU
64 I/O Registers
160 Ext I/O Reg.
Internal SRAM
Data Memory
32 Registers
(256 x 8)
cycles as described in
0x0000 - 0x001F
0x0020 - 0x005F
0x0060 - 0x00FF
0x0100
0x01FF
Figure
4-3.
11.
AT90PWM81
17