AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 49

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AT90PWM81

Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT90PWM81

Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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7.
7.1
7.1.1
7.1.2
7734P–AVR–08/10
System Control and Reset
System Control overview
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution from the
Reset Vector. The instruction placed at the Reset Vector must be a JMP – Absolute Jump – instruction to
the reset handling routine. If the program never enables an interrupt source, the Interrupt Vectors are not
used, and regular program code can be placed at these locations. This is also the case if the Reset Vector is
in the Application section while the Interrupt Vectors are in the Boot section or vice versa. The circuit dia-
gram in
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes active. This
does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal reset. This
allows the power to reach a stable level before normal operation starts. The time-out period of the delay
counter is defined by the user through the SUT and CKSEL Fuses. The different selections for the delay
period are presented in
The AT90PWM81 has four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset threshold
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than the
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the Watchdog is
• Brown-out Reset. The MCU is reset when the supply voltage V
(V
minimum pulse length. The external reset pin can be disabled in 2 ways:
enabled.
threshold (V
POT
– By the RSTDISBL fuse. In this case , the SPI programming is disabled
– By software using the RSTDIS bit in MCUCR register. In this case , the SPI programming is
Figure 7-1
still active at power up time.
).
BOT
shows the reset logic.
) and the Brown-out Detector is enabled.
“Clock Sources” on page
Table 7-1
28.
defines the electrical parameters of the reset circuitry.
CC
is below the Brown-out Reset
AT90PWM81
49

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