AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 145

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.26.4
7734P–AVR–08/10
PSC Output Behavior During Reset
Table 12-22.
• Bit 0 – PEOPn: End Of PSC n Interrupt
This bit is set by hardware when PSC n achieves its whole cycle.
Must be cleared by software by writing a one to its location.
For external component safety reason, the state of PSC outputs during Reset can be programmed by fuses
PSCRV, PSCRRB & PSC2RB.
These fuses are located in the Extended Fuse Byte :
Table 12-23.
Notes:
PSCRV gives the state low or high which will be forced on PSC outputs selected by PSC0RB & PSC2RB
fuses.
If PSCRV fuse equals 0 (programmed), the selected PSC outputs will be forced to low state. If PSCRV
fuse equals 1 (unprogrammed), the selected PSC outputs will be forced to high state.
If PSCRRB fuse equals 1 (unprogrammed), PSCOUTR0 & PSCOUTR1 keep a standard port behavior. If
PSC0RB fuse equals 0 (programmed), PSCOUTR0 & PSCOUTR1 are forced at reset to low level or high
level according to PSCRV fuse bit. In this second case, PSCOUTR0 & PSCOUTR1 keep the forced state
until PSOC0 register is written.
If PSC2RB fuse equals 1 (unprogrammed), PSCOUT20 & PSCOUT21 keep a standard port behavior. If
PSC2RB fuse equals 0 (programmed), PSCOUT20 & PSCOUT21 are forced at reset to low level or high
PRNn1
0
0
1
1
Extended Fuse Byte
PSC2RB
PSC2RBA
PSCRRB
PSCRV
PSCINRB
BODLEVEL2
BODLEVEL1
BODLEVEL0
1. See
PRNn0
0
1
0
1
(1)
(1)
(1)
PSC n Ramp Number Description
Extended Low Fuse Byte
Table 7-2 on page 52
Description
The last event which has generated an interrupt occurred during ramp 1
The last event which has generated an interrupt occurred during ramp 2
The last event which has generated an interrupt occurred during ramp 3
The last event which has generated an interrupt occurred during ramp 4
Bit No
7
6
5
4
3
2
1
0
for BODLEVEL Fuse decoding
Description
PSC2 Reset Behavior
PSC2 Reset Behavior for
OUT22 & 23
PSC Reduced Reset Behavior
PSCOUT & PSCOUTR Reset
Value
PSC & PSCR Inputs Reset
Behavior
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
Default Value
1
1
1
1
1
1 (unprogrammed)
0 (programmed)
1 (unprogrammed)
AT90PWM81
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