AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 26

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

4.5
4.6
4.6.1
4.6.2
4.6.3
26
I/O Memory
General Purpose I/O Registers
AT90PWM81
General Purpose I/O Register 0 – GPIOR0
General Purpose I/O Register 1 – GPIOR1
General Purpose I/O Register 2 – GPIOR2
The I/O space definition of the AT90PWM81 is shown in
All AT90PWM81 I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed by
the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose work-
ing registers and the I/O space. I/O registers within the address range 0x00 - 0x1F are directly bit-
accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by
using the SBIS and SBIC instructions. Refer to the instruction set section for more details. When using the
I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The
AT90PWM81 is a complex microcontroller with more peripheral units than can be supported within the
64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O
memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVR’s,
the CBI and SBI instructions will only operate on the specified bit, and can therefore be used on registers
containing such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The AT90PWM81 contains four General Purpose I/O Registers. These registers can be used for storing
any information, and they are particularly useful for storing global variables and status flags.
The General Purpose I/O Registers, within the address range 0x00 - 0x1F, are directly bit-accessible using
the SBI, CBI, SBIS, and SBIC instructions.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
7
GPIOR07
R/W
0
7
GPIOR17
R/W
0
7
GPIOR27
R/W
0
6
GPIOR06
R/W
0
6
GPIOR16
R/W
0
6
GPIOR26
R/W
0
5
GPIOR05
R/W
0
5
GPIOR15
R/W
0
5
GPIOR25
R/W
0
4
GPIOR04
R/W
0
4
GPIOR14
R/W
0
4
GPIOR24
R/W
0
3
GPIOR03
R/W
0
3
GPIOR13
R/W
0
3
GPIOR23
R/W
0
“Register Summary” on page
2
GPIOR02
R/W
0
2
GPIOR12
R/W
0
2
GPIOR22
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
GPIOR01
GPIOR11
GPIOR21
0
GPIOR00
R/W
0
0
GPIOR10
R/W
0
0
GPIOR20
R/W
0
298.
7734P–AVR–08/10
GPIOR0
GPIOR1
GPIOR2