AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 230

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

To work with the 10-bit DAC, two registers have to be updated. In order to avoid intermediate value, the
DAC input values which are really converted into analog signal are buffering into unreachable registers.
In normal mode, the update of the shadow register is done when the register DACH is written.
In case DAATE bit is set, the DAC input values will be updated on the trigger event selected through
DATS bits.
In order to avoid wrong DAC input values, the update can only be done after having written respectively
DACL and DACH registers. It is possible to work on 8-bit configuration by only writing the DACH value.
In this case, update is done each trigger event.
In case DAATE bit is cleared, the DAC is in an automatic update mode. Writing the DACH register auto-
matically update the DAC input values with the DACH and DACL register values.
It means that whatever is the configuration of the DAATE bit, changing the DACL register has no effect
on the DAC output until the DACH register has also been updated. So, to work with 10 bits, DACL must
be written first before DACH. To work with 8-bit configuration, writing DACH allows the update of the
DAC.
AT90PWM81
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