IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 42

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IDT82P2288BB

Manufacturer Part Number
IDT82P2288BB
Description
TXRX T1/J1/E1 8CHAN 256-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Type
Transceiverr
Datasheet

Specifications of IDT82P2288BB

Protocol
IEEE 1149.1
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
82P2288BB

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3.8.2
synchronization, CRC Multi-frame synchronization, and Channel Associ-
ated Signaling (CAS) Multi-frame synchronization in the received data
stream. Figure 11 shows the searching process.
monitoring the received data stream. If there are any framing bit errors,
CAS Multi-Frame alignment pattern errors, CRC Multi-Frame alignment
pattern errors or CRC errors, the Frame Processor will indicate these
errors. The status of loss of frame, loss of Signaling Multi-Frame and
loss of CRC Multi-Frame can also be detected and declared based on
user-selectable criteria. A software reset can also make the Frame
Processor reframe.
output the extracted data on a separate pin. The Frame Processor also
extracts the contents of the International bits (from both the FAS and the
NFAS frames), the National bits and the Extra bits (from TS16 in the
Functional Description
IDT82P2288
In E1 mode, the Frame Processor searches for Basic Frame
Once the frame is synchronized, the Frame Processor keeps on
The Frame Processor can extract the data stream in TS16, and
E1 MODE
42
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
frame 0 of the Signaling Multi-Frame), and stores these data in registers.
The CRC Sub Multi-Frame alignment 4 bit codeword in the National bit
positions Sa4 to Sa8 can also be extracted and stored in registers, and
updated every CRC Sub Multi-Frame.
of NFAS frames) and Remote Signaling Multi-Frame Alarm (bit 6 of
TS16 of the frame 0 of the Signaling Multi-Frame). The ‘de-bounced’
Remote Alarm and Remote Signaling Multi-Frame Alarm can be indi-
cated if the corresponding bit has been a certain logic for 1 or 4 consec-
utive times. The AIS (Alarm Indication Signal) Alarm can also be
detected. The Frame Processor can also declare a Red Alarm if the out-
of-frame condition has persisted for at least 100 ms.
occurrence of some events. The interrupts may be generated every
Basic Frame, CRC Sub Multi-Frame, CRC Multi-Frame or Signaling
Multi-Frame.
The Framer Processor identifies the Remote Alarm bit (bit 3 of TS0
An interrupt output is provided to indicate status changes and the
The Frame Processor can also be bypassed by setting the UNFM bit.
March 04, 2009

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