IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 207

• Manufacturer Part Number: IDT82P2288BB
• Description: TXRX T1/J1/E1 8CHAN 256-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2288BB

• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2288BB

T1/J1 THDLC2 Control (0A8H, 1A8H, 2A8H, 3A8H, 4A8H, 5A8H, 6A8H, 7A8H)
T1/J1 THDLC3 Control (0A9H, 1A9H, 2A9H, 3A9H, 4A9H, 5A9H, 6A9H, 7A9H)
EOM:
ABORT:
THDLCM:
TRST:
Programming Information
IDT82P2288
Bit Name
Bit Name
The function of the above three sets of registers are the same. However, they correspond to different THDLC.
A transition from ‘0’ to ‘1’ on this bit indicates an entire HDLC packet is stored in the FIFO and starts the packet transmission.
= 0: Disable the manual abort sequence insertion.
= 1: The abort sequence (‘01111111’) is manually inserted to the current HDLC packet.
This bit is self-cleared after the abortion.
= 0: HDLC mode is selected.
= 1: Reserved.
A transition from ‘0’ to ‘1’ on the this bit resets the corresponding HDLC Transmitter. The reset will clear the FIFO.
Default
Default
Bit No.
Bit No.
Type
Type
7
7
Reserved
Reserved
6
6
5
5
EOM
EOM
R/W
R/W
4
0
4
0
207
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Reserved
Reserved
3
3
ABORT
ABORT
R/W
R/W
2
0
2
0
THDLCM
THDLCM
R/W
R/W
1
0
1
0
March 04, 2009
TRST
TRST
R/W
R/W
0
0
0
0