IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 219

• Manufacturer Part Number: IDT82P2288BB
• Description: TXRX T1/J1/E1 8CHAN 256-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2288BB

• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2288BB

T1/J1 PMON Interrupt Indication 1 (0C6H, 1C6H, 2C6H, 3C6H, 4C6H, 5C6H, 6C6H, 7C6H)
LCVOVI:
T1/J1 TPLC / RPLC / PRGD Test Configuration (0C7H, 1C7H, 2C7H, 3C7H, 4C7H, 5C7H, 6C7H, 7C7H)
PRBSMODE[1:0]:
PRBSDIR:
TESTEN:
T1/J1 TPLC Access Status (0C8H, 1C8H, 2C8H, 3C8H, 4C8H, 5C8H, 6C8H, 7C8H)
BUSY:
Programming Information
IDT82P2288
Bit Name
Bit Name
Bit Name
= 0: The PMON indirect LCV Counter Mapping registers have not overflowed.
= 1: The PMON indirect LCV Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
These two bits select one mode to extract/replace the data for the PRBS Generator/Detector.
= 00: The unframed mode is selected. All 24 channels are extracted/replaced and the per-channel configuration in the TEST bit (b6, T1/J1-ID-
41~58H) is ignored.
= 01: The 8-bit-based mode is selected. The received data will only be extracted/replaced on the channel configured by the TEST bit (b6, T1/J1-ID-
41~58H).
= 10: The 7-bit-based mode is selected. The received data will only be extracted/replaced on the 7 MSB of the channel configured by the TEST bit
(b6, T1/J1-ID-41~58H).
= 11: Reserved.
= 0: The pattern in the PRBS Generator/Detector is generated in the transmit path and is detected in the receive path.
= 1: The pattern in the PRBS Generator/Detector is generated in the receive path and is detected in the transmit path.
A transition from ‘0’ to ‘1’ on this bit initiates the PRBS Generator/Detector.
= 0: No reading or writing operation on the indirect registers.
= 1: An internal indirect register is being accessed. Any new operation on the internal indirect register is not allowed.
Default
Default
Default
Bit No.
Bit No.
Bit No.
Type
Type
Type
7
7
7
6
6
6
Reserved
5
5
5
Reserved
Reserved
4
4
4
219
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
PRBSMODE1
R/W
3
3
0
3
PRBSMODE0
R/W
2
2
0
2
PRBSDIR
R/W
1
1
0
1
March 04, 2009
TESTEN
LCVOVI
BUSY
R/W
R
R
0
0
0
0
0
0