IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 318
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IDT82P2288BB
Manufacturer Part Number
IDT82P2288BB
Description
TXRX T1/J1/E1 8CHAN 256-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Type
Transceiverr
Datasheet
1.IDT82P2288BB.pdf
(362 pages)
Specifications of IDT82P2288BB
Protocol
IEEE 1149.1
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
82P2288BB
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E1 Alarm Criteria Control (0BCH, 1BCH, 2BCH, 3BCH, 4BCH, 5BCH, 6BCH, 7BCH)
AISC:
RAIC:
E1 PMON Control (0C2H, 1C2H, 2C2H, 3C2H, 4C2H, 5C2H, 6C2H, 7C2H)
UPDAT:
AUTOUPD:
Programming Information
IDT82P2288
Bit Name
Bit Name
This bit selects the AIS alarm detection criteria.
= 0: The criterion meets I.431. The AIS alarm will be declared when less than 3 zeros are detected in a 512-bit fixed window and it is out of Basic
frame synchronization, and the AIS alarm will be cleared when more than 2 zeros are detected in a 512-bit fixed window.
= 1: The criterion meets G.775. The AIS alarm will be declared when less than 3 zeros are detected in each of 2 consecutive 512-bit fixed window,
and the AIS alarm will be cleared when more than 2 zeros are detected in each of 2 consecutive 512-bit fixed window.
This bit selects the Remote alarm detection criterion.
= 0: The Remote alarm will be declared when 4 consecutive A bits are received as ‘1’, and the Remote alarm will be cleared when a single A bit is
received as ‘0’.
= 1: The Remote alarm will be declared when a single A bit is received as ‘1’, and the Remote alarm will be cleared when a single A bit is received
as ‘0’.
A transition from ‘0’ to ‘1’ on this bit updates all the PMON indirect registers.
= 0: Disable the automatic update function of the PMON indirect registers.
= 1: All the PMON indirect registers are updated every one second automatically.
Default
Default
Bit No.
Bit No.
Type
Type
7
7
6
6
5
5
Reserved
Reserved
4
4
318
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
3
3
2
2
UPDAT
AISC
R/W
R/W
1
0
1
0
March 04, 2009
AUTOUPD
RAIC
R/W
R/W
0
0
0
0
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