IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 231

• Manufacturer Part Number: IDT82P2288BB
• Description: TXRX T1/J1/E1 8CHAN 256-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2288BB

• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2288BB

T1/J1 DDSE Counter Mapping 1 (0BH)
DDSE[9:8]:
RCRB:
address corresponds to one channel.
T1/J1 Extracted Signaling Data/Extract Enable Register (01H ~ 18H)
EXTRACT:
A, B, C, D:
RPLC:
channel.
sponds to one channel.
corresponds to one channel.
Programming Information
IDT82P2288
Bit Name
Bit Name
In T1 DM format, these bits together with the DDSE[7:0] bits count the DDS Pattern Error numbers. The DDSE[9] bit is the MSB
The indirect registers of RCRB addressed from 01H to 18H are the Extracted Signaling Data / Extract Enable Registers for CH1 to CH24. Each
This bit is valid when the SF/ESF/SLC-96 frame is synchronized.
= 0: Disable the signaling bits extraction.
= 1: The signaling bits are extracted to the A,B,C,D bits (b3~0, T1/J1-ID-01~18H).
In T1-DM format, there is no signaling bits. The EXTRACT bit of all the channels should be set to ‘0’.
These bits are valid when the EXTRACT bit (b4, T1/J1-ID-01~18H) is enabled.
These bits are the extracted signaling bits. In SF format, the C, D bits are the repetition of the signaling bits A & B.
The indirect registers of RPLC addressed from 01H to 18H are the Channel Control Registers for CH1 to CH24. Each address corresponds to one
The indirect registers of RPLC addressed from 21H to 38H are the Data Trunk Conditioning Code Registers for CH1 to CH24. Each address corre-
The indirect registers of RPLC addressed from 41H to 58H are the Signaling Trunk Conditioning Code Registers for CH1 to CH24. Each address
Default
Default
Bit No.
Bit No.
Type
Type
7
7
Reserved
6
6
5
5
Reserved
EXTRACT
R/W
4
4
1
231
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
A
R
3
3
0
B
R
2
2
0
DDSE9
R
C
R
1
0
1
0
March 04, 2009
DDSE8
R
D
R
0
0
0
0